Boolean Algebra MCQs (301-400)

  1. The total number of cells in a 5-variable K-map is:
    a) 16
    b) 32
    c) 64
    d) 8
    Answer: b) 32

  2. Adjacent 1s in K-map differ by:
    a) One variable
    b) Two variables
    c) Three variables
    d) None
    Answer: a) One variable

  3. The largest possible group in a 5-variable K-map has:
    a) 16 cells
    b) 8 cells
    c) 32 cells
    d) 4 cells
    Answer: a) 16 cells

  4. A group of two adjacent cells in K-map eliminates:
    a) 1 variable
    b) 2 variables
    c) 3 variables
    d) 0 variable
    Answer: a) 1 variable

  5. A group of four adjacent cells in K-map eliminates:
    a) 2 variables
    b) 3 variables
    c) 1 variable
    d) None
    Answer: a) 2 variables

  6. A group of eight cells in K-map eliminates:
    a) 3 variables
    b) 4 variables
    c) 2 variables
    d) None
    Answer: a) 3 variables

  7. The term formed by grouping all 1s in a K-map is:
    a) 1
    b) 0
    c) A + B
    d) Undefined
    Answer: a) 1

  8. The term formed by grouping no 1s in a K-map is:
    a) 0
    b) 1
    c) Undefined
    d) A
    Answer: a) 0

  9. In K-map, grouping must be of size:
    a) 1, 2, 4, 8, … (power of 2)
    b) 2, 3, 5
    c) 4, 5, 7
    d) 1, 3, 6
    Answer: a) 1, 2, 4, 8, … (power of 2)

  10. In K-map, a single 1-cell represents:
    a) A minterm
    b) A maxterm
    c) A redundant term
    d) A don’t-care
    Answer: a) A minterm

  11. A NOR gate followed by a NOT gate acts as:
    a) OR gate
    b) NAND gate
    c) AND gate
    d) XOR gate
    Answer: a) OR gate

  1. A NAND gate followed by a NOT gate acts as:
    a) AND gate
    b) OR gate
    c) NOR gate
    d) XOR gate
    Answer: a) AND gate

  2. Which logic family uses diode-resistor logic?
    a) DTL
    b) RTL
    c) TTL
    d) ECL
    Answer: b) RTL

  3. Which logic family uses transistor-transistor logic?
    a) TTL
    b) RTL
    c) CMOS
    d) DTL
    Answer: a) TTL

  4. The main advantage of CMOS logic family is:
    a) Low power consumption
    b) High speed
    c) Large current drive
    d) Expensive
    Answer: a) Low power consumption

  5. Fan-in of a logic gate means:
    a) Number of inputs
    b) Number of outputs
    c) Power consumption
    d) Propagation delay
    Answer: a) Number of inputs

  6. Fan-out of a logic gate means:
    a) Number of gates driven by output
    b) Number of inputs
    c) Delay time
    d) Power used
    Answer: a) Number of gates driven by output

  7. The logic level “1” in TTL corresponds approximately to:
    a) 5V
    b) 0V
    c) 2.4V to 5V
    d) 0.8V
    Answer: c) 2.4V to 5V

  8. The logic level “0” in TTL corresponds approximately to:
    a) 0V to 0.8V
    b) 2.4V to 5V
    c) 5V
    d) 1.5V
    Answer: a) 0V to 0.8V

  9. The propagation delay of logic gates is measured in:
    a) Nanoseconds
    b) Microseconds
    c) Seconds
    d) Picofarads
    Answer: a) Nanoseconds

  1. NAND and NOR gates are called universal because:
    a) They can implement any Boolean function
    b) They have more inputs
    c) They are cheapest
    d) They are fastest
    Answer: a) They can implement any Boolean function

  2. Using NAND gates, NOT function can be made by:
    a) Connecting both inputs together
    b) Using two NANDs
    c) Inverting one input
    d) Adding an OR gate
    Answer: a) Connecting both inputs together

  3. Using NOR gates, NOT function can be made by:
    a) Connecting both inputs together
    b) Using two NORs
    c) Adding an AND
    d) Using OR
    Answer: a) Connecting both inputs together

  4. AND gate using NAND only:
    a) (A·B)”
    b) (A + B)”
    c) (A·B)’
    d) (A + B)’
    Answer: a) (A·B)”

  5. OR gate using NOR only:
    a) (A + B)”
    b) (A·B)”
    c) (A·B)’
    d) (A + B)’
    Answer: a) (A + B)”

  6. XOR gate can be implemented using:
    a) 4 NAND gates
    b) 2 NOR gates
    c) 1 AND + 1 OR
    d) 1 NAND
    Answer: a) 4 NAND gates

  7. A NOR gate can be used to realize:
    a) NOT, OR, NOR
    b) XOR only
    c) AND only
    d) None
    Answer: a) NOT, OR, NOR

  8. A NAND gate can be used to realize:
    a) NOT, AND, NAND
    b) OR only
    c) XOR
    d) NOR
    Answer: a) NOT, AND, NAND

  9. A logic circuit producing output = 1 only when all inputs are 0 is:
    a) NOR gate
    b) NAND gate
    c) XOR gate
    d) XNOR gate
    Answer: a) NOR gate

  10. A logic circuit producing output = 0 only when all inputs are 1 is:
    a) NAND gate
    b) NOR gate
    c) AND gate
    d) OR gate
    Answer: a) NAND gate


🔹 Practical and Theoretical Laws

  1. The Distributive Law of Boolean algebra:
    a) A(B + C) = AB + AC
    b) (A + B)C = AC + BC
    c) Both a and b
    d) None
    Answer: c) Both a and b

  2. The Involution Law says:
    a) (A’)’ = A
    b) (A’)’ = A’
    c) (A”)’ = 0
    d) (A + A’)’ = A
    Answer: a) (A’)’ = A

  3. Which of the following is not a valid Boolean law?
    a) A + A = A
    b) A + 1 = A
    c) A + 0 = A
    d) A·1 = A
    Answer: b) A + 1 = A

  4. The Absorption Law simplifies A + AB to:
    a) A
    b) B
    c) AB
    d) A + B
    Answer: a) A

  5. The Consensus Theorem eliminates redundant terms in:
    a) AB + A’C + BC
    b) AB + A’C’ + BC’
    c) A + B + C
    d) AB + AC + BC
    Answer: a) AB + A’C + BC

  6. The Duality Principle means:
    a) Replace + with · and 1 with 0
    b) Replace 1 with 0 only
    c) Replace A with A’
    d) Complement all literals
    Answer: a) Replace + with · and 1 with 0

  7. Shannon’s Expansion Theorem states that:
    a) F = A·F(1) + A’·F(0)
    b) F = A + A’
    c) F = A·B + A’·B’
    d) F = A·B’ + A’·B
    Answer: a) F = A·F(1) + A’·F(0)

  8. Simplify using Shannon’s theorem: F(A,B) = A + B.
    a) F = A + B
    b) F = AB
    c) F = A’ + B’
    d) F = A’B
    Answer: a) F = A + B

  9. The Distributive Law helps in:
    a) Factoring or expanding expressions
    b) Complementing variables
    c) Implementing NOT
    d) Creating XORs
    Answer: a) Factoring or expanding expressions

  10. The Commutative Law helps in:
    a) Changing the order of operands
    b) Complementing variables
    c) Simplifying NOR
    d) Eliminating redundancy
    Answer: a) Changing the order of operands


🔹 Logic Circuit Applications

  1. The basic digital building blocks are:
    a) Logic gates
    b) Microprocessors
    c) Transistors
    d) Registers
    Answer: a) Logic gates

  2. A decoder is used for:
    a) Converting binary input to one-hot output
    b) Storing data
    c) Adding binary numbers
    d) Multiplying numbers
    Answer: a) Converting binary input to one-hot output

  3. An encoder performs the reverse of:
    a) Decoder
    b) Multiplexer
    c) Demultiplexer
    d) Adder
    Answer: a) Decoder

  4. A multiplexer is also called:
    a) Data selector
    b) Decoder
    c) Encoder
    d) Flip-flop
    Answer: a) Data selector

  5. A demultiplexer is also called:
    a) Data distributor
    b) Encoder
    c) Comparator
    d) Flip-flop
    Answer: a) Data distributor

  6. In a 4-to-1 multiplexer, number of select lines is:
    a) 2
    b) 3
    c) 4
    d) 1
    Answer: a) 2

  7. The number of outputs in a 2-to-4 decoder is:
    a) 4
    b) 2
    c) 8
    d) 1
    Answer: a) 4

  8. The output of a NAND gate is logic 0 when:
    a) All inputs are 1
    b) Any input is 0
    c) Any input is 1
    d) Both inputs are 0
    Answer: a) All inputs are 1

  9. The output of a NOR gate is logic 1 when:
    a) All inputs are 0
    b) Any input is 1
    c) Any input is 0
    d) Both inputs are 1
    Answer: a) All inputs are 0

  10. The Boolean expression for a 2-input NAND is:
    a) (A·B)’
    b) (A + B)’
    c) A’ + B’
    d) A·B
    Answer: a) (A·B)’


🔹 Boolean & Logic Design (Application & Conceptual)

  1. In Boolean algebra, A(A + B) = ?
    a) A
    b) AB
    c) A + B
    d) 0
    Answer: a) A

  2. Simplify A + AB’:
    a) A + B’
    b) A
    c) A’ + B
    d) B’
    Answer: b) A

  3. Simplify A(A’ + B):
    a) AB
    b) A’ + B
    c) A + B
    d) AB + A’
    Answer: a) AB

  4. Simplify A + A’B:
    a) A + B
    b) A’ + B’
    c) A·B
    d) A’·B
    Answer: a) A + B

  5. Simplify A(B + C) + A’C:
    a) AB + C
    b) A + C
    c) B + C
    d) AB’ + C
    Answer: a) AB + C

  6. Simplify A’B + AB + AB’:
    a) A + B
    b) A + B’
    c) A’ + B
    d) B + A’
    Answer: a) A + B

  7. Simplify (A + B)(A + B’):
    a) A
    b) B
    c) A + B
    d) A·B
    Answer: a) A

  8. Simplify A + AB + AB’:
    a) A
    b) B
    c) A + B
    d) A’ + B
    Answer: a) A

  9. Simplify A·(A + B’):
    a) A
    b) AB’
    c) A + B’
    d) B’
    Answer: a) A

  10. Simplify (A + B’)(A’ + B’):
    a) B’
    b) A’
    c) A + B’
    d) B
    Answer: a) B’

  1. Boolean algebra is used in:
    a) Digital circuits
    b) Probability theory
    c) Relativity
    d) Analog amplifiers
    Answer: a) Digital circuits

  2. Boolean algebra was developed by:
    a) George Boole
    b) Isaac Newton
    c) Charles Babbage
    d) Alan Turing
    Answer: a) George Boole

  3. The output of XOR gate when both inputs are 1 is:
    a) 0
    b) 1
    c) Undefined
    d) Same as input
    Answer: a) 0

  4. A 3-input NAND gate gives output 0 only when:
    a) All inputs = 1
    b) All inputs = 0
    c) One input = 0
    d) Two inputs = 0
    Answer: a) All inputs = 1

  5. A 3-input NOR gate gives output 1 only when:
    a) All inputs = 0
    b) All inputs = 1
    c) Any input = 1
    d) One input = 0
    Answer: a) All inputs = 0

  6. The output of XNOR gate when inputs differ is:
    a) 0
    b) 1
    c) Undefined
    d) Same as A
    Answer: a) 0

  7. Logic 1 corresponds to:
    a) High voltage
    b) Low voltage
    c) Negative
    d) Floating state
    Answer: a) High voltage

  8. Logic 0 corresponds to:
    a) Low voltage
    b) High voltage
    c) Undefined
    d) Constant
    Answer: a) Low voltage

  9. In Boolean algebra, A + 0 = ?
    a) A
    b) 0
    c) 1
    d) A’
    Answer: a) A

  10. In Boolean algebra, A·0 = ?
    a) 0
    b) 1
    c) A
    d) Undefined
    Answer: a) 0


🔹 Conceptual True/False Type (MCQ Format)

  1. XOR is associative.
    a) True
    b) False
    Answer: a) True

  2. AND gate is commutative.
    a) True
    b) False
    Answer: a) True

  3. OR gate is distributive over AND.
    a) True
    b) False
    Answer: a) True

  4. AND gate distributes over OR.
    a) True
    b) False
    Answer: a) True

  5. NOR gate is associative.
    a) False
    b) True
    Answer: a) False

  6. NAND gate is commutative.
    a) True
    b) False
    Answer: a) True

  7. XNOR is associative.
    a) True
    b) False
    Answer: b) False

  8. (A + B)’ = A’ + B’
    a) False
    b) True
    Answer: a) False

  9. (A·B)’ = A’ + B’
    a) True
    b) False
    Answer: a) True

  10. (A + B)(A’ + B) = B
    a) True
    b) False
    Answer: a) True


🔹 Mixed Application & Numerical Logic

  1. Number of Boolean functions of 4 variables = ?
    a) 16
    b) 65,536
    c) 256
    d) 1024
    Answer: b) 65,536

  2. Number of literals in a 3-variable Boolean equation:
    a) 3
    b) 8
    c) 2³
    d) 2⁸
    Answer: b) 8

  3. Boolean algebra is similar to:
    a) Set algebra
    b) Arithmetic algebra
    c) Matrix algebra
    d) Vector algebra
    Answer: a) Set algebra

  4. Which operation corresponds to union in set theory?
    a) OR
    b) AND
    c) NOT
    d) XOR
    Answer: a) OR

  1. Which operation in Boolean algebra corresponds to intersection in set theory?
    a) AND
    b) OR
    c) NOT
    d) XOR
    Answer: a) AND

  2. Which operation in Boolean algebra corresponds to complementation in set theory?
    a) NOT
    b) OR
    c) AND
    d) XOR
    Answer: a) NOT

  3. The Boolean expression for a 3-input majority gate is:
    a) AB + BC + AC
    b) A + B + C
    c) A’B’ + BC
    d) AB’C’ + A’BC
    Answer: a) AB + BC + AC

  4. The dual of the Boolean equation A+0=AA + 0 = A is:
    a) A·1 = A
    b) A·0 = 0
    c) A + 1 = 1
    d) A’ + 1 = A’
    Answer: a) A·1 = A

  5. A half adder can be implemented using:
    a) XOR and AND gates
    b) NAND and NOR gates
    c) OR and AND gates
    d) NOT and OR gates
    Answer: a) XOR and AND gates

  6. The carry output of a half adder is:
    a) A·B
    b) A + B
    c) A ⊕ B
    d) (A + B)’
    Answer: a) A·B

  7. The sum output of a half adder is:
    a) A ⊕ B
    b) A + B
    c) A·B
    d) A’ + B’
    Answer: a) A ⊕ B

  8. A full adder can be implemented using:
    a) Two half adders and one OR gate
    b) Two XOR gates
    c) One NAND and one NOR gate
    d) Three AND gates only
    Answer: a) Two half adders and one OR gate

  9. The Boolean equation for a 2-to-1 multiplexer is:
    a) Y = S’A + SB
    b) Y = SA + S’B
    c) Y = A + B
    d) Y = A·B
    Answer: a) Y = S’A + SB

  10. The number of minterms in a 3-variable Boolean function is:
    a) 8
    b) 4
    c) 16
    d) 32
    Answer: a) 8

  11. A don’t-care condition in K-map is used to:
    a) Simplify expressions more easily
    b) Create new terms
    c) Increase variables
    d) Add redundancy
    Answer: a) Simplify expressions more easily

  12. The Boolean expression for exclusive OR (XOR) is:
    a) A’B + AB’
    b) AB + A’B’
    c) (A + B)’
    d) (A·B)’
    Answer: a) A’B + AB’

  13. The XNOR gate is also known as:
    a) Equality gate
    b) Inequality gate
    c) Parity checker
    d) Inverter
    Answer: a) Equality gate

  14. The output of XNOR gate is 1 when:
    a) Both inputs are equal
    b) Both inputs are different
    c) One input is 1
    d) Both are 0 only
    Answer: a) Both inputs are equal

  15. Simplify the Boolean expression: A·B + A·B’
    a) A
    b) B
    c) A + B
    d) A’
    Answer: a) A

  16. Simplify the Boolean expression: (A + B)(A + B’)
    a) A
    b) B
    c) A + B
    d) AB
    Answer: a) A

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